Traditionally used multilayer printed wiring boards with capacitor circuits embedded therein are such that one or more of the insulating layers locating in their inner layer(s) is(are) used as a dielectric layer(s) and top electrodes and base electrodes, as capacitors, face each other in the respective inner layer circuits locating on both sides of each dielectric layer. Accordingly, these capacitor circuits are sometimes referred to as embedded capacitor circuits.
For these multilayer printed wiring boards with embedded capacitor circuits, the manufacturing method shown in FIGS. 17 to 19, to which a popular process for manufacturing a printed wiring board is applied, has been examined. Specifically, it is expected that inner layer core material 2a shown in FIG. 17(a) (in the figure, insulating layer 3 with base electrodes 4 formed on its one side or both sides) is used and on both sides of inner layer core material 2a dielectric layer 5, for which a high-dielectric-constant material is used, and first conductive metal foil 6 are laminated so as to obtain the laminate in the state shown in FIG. 17(b).
Then, first conductive metal layers 6 locating as outer layers are processed into top electrodes with circuits, which are to be top electrodes 7 of capacitors, by etching or the like so as to obtain the state shown in FIG. 18(c). At this time, the area of each dielectric layer other than the circuits is exposed.
Then, on the top electrodes 7, prepreg 11 and second conductive metal foil 8 are laminated, as shown in FIG. 18(d) (in the figure, the skeletal material contained in the prepreg is omitted, and the same is applicable throughout this specification). And second conductive metal layers 8 locating as outer layers are processed into outer layer circuits to be top electrodes 7 of capacitors, by etching or the like so as to obtain multilayer printed wiring board 1′ with embedded capacitors shown in FIG. 19(e).
The method for manufacturing a multilayer printed wiring board with embedded capacitors shown in FIGS. 17 to 19 uses a popular process for manufacturing a multilayer printed wiring board just as it is, whereby dielectric layers spread throughout the multilayer printed wiring board, allowing dielectric layers to exist not only on the base of capacitor circuits, but also on the base of power lines or signal lines and its vicinities. These dielectric layers cause the problem of increasing dielectric loss during the time of transmitting signals etc. since they have a high dielectric constant. Furthermore, in many cases, it is impossible to bury other devices, such as an inductor, in such dielectric layers, which usually imposes a certain constraint on circuit design.
Accordingly, to form dielectric layers only on the sites which require the layers, the method have been employed among persons skilled in the art in which the insulating layers provided on the surfaces of the inner layer substrates are subjected to hole-opening and in the resultant openings a high-dielectric-constant material is buried, as disclosed in Patent Document 1, or in which a layer of a resin film with capacitor circuits formed thereon in advance is transferred onto the surface(s) of an inner layer core material, as disclosed in Patent Document 2, or in which paste containing a dielectric filler is printed by screen printing, as disclosed in Patent Document 3.
[Patent Document 1] Japanese Patent Laid-Open No. 09-116247
[Patent Document 2] Japanese Patent Laid-Open No. 2000-323845
[Patent Document 3] Japanese Patent Laid-Open No. 08-125302
When intending to manufacture a multilayer printed wiring board with embedded capacitor layer by using the above described popular process for manufacturing a printed wiring board, however, a serious problem has arisen in laminating dielectric layer 5 and first conductive metal foil 6 on both sides of inner layer core material 2a shown in FIG. 17(a). The content of filler in dielectric layer 5 is generally higher than 80 wt %, and due to the small amount of resin, resin flow was low at the time of the lamination, thereby being unable to fill in the gaps among the base electrodes successfully, and hence it was impossible to obtain the ideal state as shown in FIG. 17(b).
Further, even if the above process can be employed successfully and remove the problem of the registration accuracy of the capacitor circuits, in the multilayer printed wiring board obtained by the above process, dielectric layers spread throughout the printed wiring board. Thus, it is impossible to allow dielectric layers to remain only on the sites where they are required. Furthermore, in the invention disclosed in Japanese Patent Laid-Open No. 2000-323845 or Japanese Patent Laid-Open No. 08-125302, though the problem can be eliminated of dielectric layers' remaining on the sites where they are not required, the invention still cause the problem of insufficient uniformity of dielectric layer thickness and insufficient registration accuracy when carrying out transfer method or screen printing method.
Capacitors are required to have the capacitance as largest as possible as their fundamental quality. The capacitance of a capacitor (C) is calculated by using the following equation, C=∈∈0 (A/d) (where ∈0 is the dielectric constant of vacuum). Particularly because of the recent trend toward down-sizing of electronic or electric equipment, printed wiring boards are also required to be down-sized, and it is almost impossible to increase the area of capacitor electrodes within a given area of printed wiring boards. Thus, it is apparent that the improvement in the surface area (A) has a limitation. Accordingly, to increase the capacitance of capacitors, it is necessary to decrease the thickness (d) of dielectric layers, when the surface area (A) of capacitor electrodes and the relative dielectric constant (∈) of dielectric layers are constant. In such a situation, insufficient uniformity of dielectric layer thickness is not favorable because it may cause greater deviation in capacitor quality.
In the case where the problem of registration accuracy is involved in carrying out transfer method or screen printing method, deviation is created between the positions of top electrodes and base electrodes carefully formed. As a result, the effective area of the surface area (A), which influences the capacitance of capacitors, may decrease, thereby making it impossible to obtain capacitor performance as it is designed. It may cause out-of-specification of product quality.
Thus, there has been a need for a method for manufacturing a multilayer printed wiring board which does not require a complicated manufacturing process, provides excellent uniformity of dielectric layer thickness and registration accuracy of capacitor circuits and largest area of dielectric layer as possible except for that of the capacitor circuit portion is removed and for a multilayer printed wiring board with capacitor circuits embedded therein which is manufactured by using such a method.